1. Technical Field
Various embodiments may generally relate to a semiconductor device, and more particularly, to a semiconductor device relating to a 2N mode.
2. Related Art
A semiconductor device such as DRAM transmits and receives information to and from an external device, using a clock. That is, the external device transmits information with the clock, and the semiconductor device recognizes information transmitted at a rising edge and/or falling edge of the clock as a valid value.
The recent trend is to increase the frequency of a clock, in order to increase the transmission rate of data. However, the increase in frequency of the clock decreases a setup and hold (setup/hold) margin of information, thereby increasing the possibility that an error will occur when the information is transmitted.
In order to secure a setup/hold margin, the frequency of an external clock may be lowered to half. This mode is referred to as a 2N mode. That is, in the 2N mode, information is inputted at each two cycles of the external clock.
In order for an existing semiconductor device to operate in the 2N mode, many components of the semiconductor device need to be changed.